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 1SMC5.0AT3 Series
1500 Watt Peak Power Zener Transient Voltage Suppressors
Unidirectional*
The SMC series is designed to protect voltage sensitive components from high voltage, high energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. The SMC series is supplied in ON Semiconductor's exclusive, cost-effective, highly reliable SurmeticTM package and is ideally suited for use in communication systems, automotive, numerical controls, process controls, medical equipment, business machines, power supplies and many other industrial/consumer applications.
Specification Features: http://onsemi.com
* * * * * * * * *
PLASTIC SURFACE MOUNT ZENER TRANSIENT VOLTAGE SUPPRESSORS 5.0-78 VOLTS 1500 WATT PEAK POWER
Working Peak Reverse Voltage Range - 5.0 V to 78 V Standard Zener Breakdown Voltage Range - 6.7 V to 91.25 V Peak Power - 1500 Watts @ 1 ms ESD Rating of Class 3 (>16 KV) per Human Body Model Maximum Clamp Voltage @ Peak Pulse Current Low Leakage < 5 A Above 10 V UL 497B for Isolated Loop Circuit Protection Maximum Temperature Coefficient Specified Response Time is Typically < 1 ns
Cathode
Anode
Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are
SMC CASE 403 PLASTIC
readily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
MARKING DIAGRAM
YWW Gxx Y WW Gxx = Year = Work Week = Specific Device Code = (See Table on Page 3)
260C for 10 Seconds
LEADS: Modified L-Bend providing more contact area to bond pads POLARITY: Cathode indicated by molded polarity notch MOUNTING POSITION: Any MAXIMUM RATINGS
Please See the Table on the Following Page
ORDERING INFORMATION
Device { 1SMCxxxAT3 Package SMC Shipping 2500/Tape & Reel
Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value.
*Bidirectional devices will not be available in this series. The "T3" suffix refers to a 13 inch reel.
(c) Semiconductor Components Industries, LLC, 2001
1
May, 2001 - Rev. 3
Publication Order Number: 1SMC5.0AT3/D
1SMC5.0AT3 Series
MAXIMUM RATINGS
Rating Peak Power Dissipation (Note 1.) @ TL = 25C, Pulse Width = 1 ms DC Power Dissipation @ TL = 75C Measured Zero Lead Length (Note 2.) Derate Above 75C Thermal Resistance from Junction to Lead DC Power Dissipation (Note 3.) @ TA = 25C Derate Above 25C Thermal Resistance from Junction to Ambient Forward Surge Current (Note 4.) @ TA = 25C Operating and Storage Temperature Range 1. 2. 3. 4. Symbol PPK PD Value 1500 4.0 54.6 18.3 0.75 6.1 165 200 -65 to +150 Unit W W mW/C C/W W mW/C C/W A C
RqJL PD RqJA IFSM TJ, Tstg
10 X 1000 ms, non-repetitive 1 square copper pad, FR-4 board FR-4 board, using ON Semiconductor minimum recommended footprint, as shown in 403 case outline dimensions spec. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
ELECTRICAL CHARACTERISTICS (TA = 25C unless
otherwise noted, VF = 3.5 V Max @ IF = 100 A) (Note 5.) Symbol IPP VC VRWM IR VBR IT IF VF Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Forward Current Forward Voltage @ IF VC VBR VRWM IF
I
IR VF IT
V
IPP
5. 1/2 sine wave or equivalent, PW = 8.3 ms non-repetitive duty cycle
Uni-Directional TVS
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1SMC5.0AT3 Series
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
VRWM (Note 6.) Volts 5.0 6.0 6.5 7.0 7.5 8.0 8.5 9.0 10 11 12 13 14 15 16 17 18 20 22 24 26 28 30 33 36 40 43 45 48 51 54 58 60 64 70 75 78 Breakdown Voltage IR @ VRWM A 1000 1000 500 200 100 50 25 10 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 VBR Volts (Note 7.) Min 6.4 6.67 7.22 7.78 8.33 8.89 9.44 10 11.1 12.2 13.3 14.4 15.6 16.7 17.8 18.9 20 22.2 24.4 26.7 28.9 31.1 33.3 36.7 40 44.4 47.8 50 53.3 56.7 60 64.4 66.7 71.1 77.8 83.3 86.7 Nom 6.7 7.02 7.6 8.19 8.77 9.36 9.92 10.55 11.7 12.85 14 15.15 16.4 17.6 18.75 19.9 21.05 23.35 25.65 28.1 30.4 32.75 35.05 38.65 42.1 46.75 50.3 52.65 56.1 59.7 63.15 67.8 70.2 74.85 81.9 87.7 91.25 Max 7.0 7.37 7.98 8.6 9.21 9.83 10.4 11.1 12.3 13.5 14.7 15.9 17.2 18.5 19.7 20.9 22.1 24.5 26.9 29.5 31.9 34.4 36.8 40.6 44.2 49.1 52.8 55.3 58.9 62.7 66.3 71.2 73.7 78.6 86 92.1 95.8 @ IT mA 10 10 10 10 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VC @ IPP (Note 8.) VC Volts 9.2 10.3 11.2 12 12.9 13.6 14.4 15.4 17 18.2 19.9 21.5 23.2 24.4 26 27.6 29.2 32.4 35.5 38.9 42.1 45.4 48.4 53.3 58.1 64.5 69.4 72.2 77.4 82.4 87.1 93.6 96.8 103 113 121 126 IPP Amps 163 145.6 133.9 125 116.3 110.3 104.2 97.4 88.2 82.4 75.3 69.7 64.7 61.5 57.7 53.3 51.4 46.3 42.2 38.6 35.6 33 31 28.1 25.8 32.2 21.6 20.6 19.4 18.2 17.2 16 15.5 14.6 13.3 12.4 11.4
Device 1SMC5.0AT3 1SMC6.0AT3 1SMC6.5AT3 1SMC7.0AT3 1SMC7.5AT3 1SMC8.0AT3 1SMC8.5AT3 1SMC9.0AT3 1SMC10AT3 1SMC11AT3 1SMC12AT3 1SMC13AT3 1SMC14AT3 1SMC15AT3 1SMC16AT3 1SMC17AT3 1SMC18AT3 1SMC20AT3 1SMC22AT3 1SMC24AT3 1SMC26AT3 1SMC28AT3 1SMC30AT3 1SMC33AT3 1SMC36AT3 1SMC40AT3 1SMC43AT3 1SMC45AT3 1SMC48AT3 1SMC51AT3 1SMC54AT3 1SMC58AT3 1SMC60AT3 1SMC64AT3 1SMC70AT3 1SMC75AT3 1SMC78AT3
Device Marking GDE GDG GDK GDM GDP GDR GDT GDV GDX GDZ GEE GEG GEK GEM GEP GER GET GEV GEX GEZ GFE GFG GFK GFM GFP GFR GFT GFV GFX GFZ GGE GGG GGK GGM GGP GGR GGT
6. A transient suppressor is normally selected according to the maximum working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 7. VBR measured at pulse test current IT at an ambient temperature of 25C. 8. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data - 1500 Watt at the beginning of this group.
http://onsemi.com
3
1SMC5.0AT3 Series
100 NONREPETITIVE PULSE WAVEFORM SHOWN IN FIGURE 2 tr 10 s 100 VALUE (%) PEAK VALUE - IPP IPP 2 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP.
Ppk, PEAK POWER (kW)
10
HALF VALUE 50 tP
1
0.1 s
1 s
10 s
100 s tP, PULSE WIDTH
1 ms
10 ms
0
0
1
2 t, TIME (ms)
3
4
Figure 1. Pulse Rating Curve
160 PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ T = 25 C A 140 120 100 80 60 40 20 0 0 25 50 75 100 125 150 1000 IT, TEST CURRENT (AMPS) 500 200 100 50 20 10 5 2 1 0.3 TL = 25C tP = 10 s
Figure 2. Pulse Waveform
VBR (NOM) = 6.8 TO 13 V 20 V 43 V 24 V 75 V 120 V 180 V
0.5 0.7 1
2
3
5
7
10
20
30
TA, AMBIENT TEMPERATURE (C)
VBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR (NOM) (VOLTS)
Figure 3. Pulse Derating Curve
Figure 4. Dynamic Impedance
UL RECOGNITION The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGV2) under the UL standard for safety 497B and File #116110. Many competitors only have one or two devices recognized or have recognition in a non-protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests including Strike Voltage Breakdown test, Endurance Conditioning, Temperature test, Dielectric Voltage-Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category.
http://onsemi.com
4
1SMC5.0AT3 Series
APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitive effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 5. The inductive effects in the device are due to actual turn-on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 6. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. The SMC series have a very good response time, typically < 1 ns and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper circuit layout,
minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Zin is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation.
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions and at a lead temperature of 25C. If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 7. Average power must be derated as the lead or ambient temperature rises above 25C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. At first glance the derating curves of Figure 7 appear to be in error as the 10 ms pulse has a higher derating factor than the 10 s pulse. However, when the derating factor for a given pulse of Figure 7 is multiplied by the peak power value of Figure 1 for the same pulse, the results follow the expected trend.
http://onsemi.com
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1SMC5.0AT3 Series
TYPICAL PROTECTION CIRCUIT
Zin
Vin
LOAD
VL
V
Vin (TRANSIENT) VL
V
OVERSHOOT DUE TO INDUCTIVE EFFECTS
Vin (TRANSIENT) VL
Vin td tD = TIME DELAY DUE TO CAPACITIVE EFFECT t
t
Figure 5.
Figure 6.
1 0.7 0.5 DERATING FACTOR 0.3 0.2 0.1 0.07 0.05 0.03 0.02 10 s 0.01 0.1 0.2 0.5 1 2 5 10 D, DUTY CYCLE (%) 20 50 100 100 s PULSE WIDTH 10 ms
1 ms
Figure 7. Typical Derating Factor for Duty Cycle
http://onsemi.com
6
1SMC5.0AT3 Series
OUTLINE DIMENSIONS
Transient Voltage Suppressors - Surface Mounted
1500 Watt Peak Power
SMC CASE 403-03 ISSUE B
S A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P. INCHES DIM MIN MAX A 0.260 0.280 B 0.220 0.240 C 0.075 0.095 D 0.115 0.121 H 0.0020 0.0060 J 0.006 0.012 K 0.030 0.050 P 0.020 REF S 0.305 0.320 MILLIMETERS MIN MAX 6.60 7.11 5.59 6.10 1.90 2.41 2.92 3.07 0.051 0.152 0.15 0.30 0.76 1.27 0.51 REF 7.75 8.13
D
B
C J H
K
P
0.171 4.343
0.150 3.810
0.110 2.794
inches mm
SMC Footprint
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1SMC5.0AT3 Series
Surmetic is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (Mon-Fri 2:30pm to 7:00pm CET) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (Mon-Fri 2:00pm to 7:00pm CET) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (Mon-Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com Toll-Free from Mexico: Dial 01-800-288-2872 for Access - then Dial 866-297-9322 ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 1-303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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1SMC5.0AT3/D


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